BRUCKMUEHL, Germany & SAN JOSE, Calif.—(BUSINESS WIRE)—May 22, 2006—
ProDesign, a leading supplier of ASIC and SoC
verification platforms, today announced the availability of a SCE-MI
based interface for transaction based verification for its successful
CHIPit ASIC prototyping product line.
Due to the increasing complexity and sizes of ASIC/SoC designs,
verification has become one of the most challenging tasks design and
verification engineers face today. For large designs, simulator
performance rapidly decreases. The simulation performance drops to
1-10 Hz precisely at the point in the verification process that
requires millions of clock cycles to adequately test and verify
software functionality.
At such rates, software debug would take several months.
Simulation accelerators or standard hardware emulators can accelerate
the speed from 80 KHz up to 2 MHz at best and thereby significantly
cut the verification time compared to pure simulation. However, the
performance that is achieved with such machines in most cases is still
inadequate to develop and verify firmware and software that require
speeds between 1 and 20 MHz. To reach such a speed, new verification
methodologies like Transaction Based Verification can be used.
"By combining our CHIPit high-speed prototyping systems with an
SCE-MI interface, ProDesign offers a solution on the transaction-based
level which increases verification performance up to in-circuit speed
(10 to 150 MHz) and reduces the time-to-market dramatically," said
Gunnar Scholl, Director Marketing and Business Development at
ProDesign.
"Most co-emulation verification environments have been
event-based, which means they have to provide data on every clock
cycle or even every sub-cycle. This event-based mechanism is
responsible for speed decrease in the co-simulation mode and allows a
maximum speed in the kHz region. In contrast, the transaction-based
verification mode accelerates the verification by allowing large
amounts of data representing single or multiple clock cycles to be
passed into simulation without multiple calls. This mechanism helps
minimize the communication traffic of the events between the host
(test bench) and the CHIPit system (prototyping system) resulting in
an accelerated co-emulation and a dramatically shortened verification
time," added Heiko Mauersberger, CTO of ProDesign.
Availability
The SCE-MI Transaction Based Verification tool set is immediately
available with a starting price of 15,000 EUR in Europe and 18,000 US$
in North America.
More information at: http://www.uchipit.com.
Contact:
ProDesign Electronic & CAD Layout GmbH
Gunnar Scholl, +49-8062-808-446
Email Contact
or
VitalCom PR
Joe Basques, 650-366-8212 (PR North America)
fax: 650-365-4658
Email Contact
www.vitalcompr.com
or
WICKPR & partners
Helga Wick, +49-89-306688-66 (PR Europe)
fax: +49-89-306688-88
Email Contact
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